Some example embodiments of the present inventive concepts relate to a technology of manufacturing a field effect transistor (FET) using a gate last process, and more particularly to a method of reducing parasitic capacitance component occurring in the gate last process, and the field effect transistor (FET) manufactured according to the method.
As field effect transistors (FETs) become miniaturized, a short channel effect occurs. The short channel effect means various phenomena which decrease performance of the FET as a gate length of the FET becomes decreasing.
According to the short channel effect, a leakage current of the FET is increased, a punchthrough voltage is decreased, and a current flowing in the FET is not saturated and keeps increasing according to an increase in a drain voltage. For example, the short channel effect may occur when a distance between a source and a drain gets closer according to a process miniaturization. In order to improve the short channel effect, a FET including a high-k dielectric and a metal gate has been developed and used.